Samsung S3FM02G User Manual

S3FM02G 32-Bit CMOS MICROCONTROLLERS Revision 1.00 January 2011  2010 Samsung Electronics Co., Ltd. All rights reserved.

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-2 1.3 Features  CPU  32-bit RISC ARM CortexTM-M3 Core  ETM function embedded with ARM CortexTM-M3  SWD(

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-3  TC: 16-bit Timer/Counter  Up to 8 channels (TC0 ~ TC7)  Operation in an interval, capture, match &

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-4  USART: Universal Sync/Async Receiver Transmitter  Up to 4 channels  Support 5, 6, 7, and 8bit Data leng

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-5  LCDC: LCD Controller  4 com x 40 segment  Static, 1/2 and 1/3 bias mode  External and internal resist

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-6 1.4 Block Diagram CM3 CoreInterruptssleepdebugNVIVSWJ-DPSystickAHB-APInstDataDWP ITMAPBI-CodeD-CodeS-BUSCort

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-1 2 PIN CONFIGURATION 2.1 Pin Configuration S3FM02G(128-ETQFP-1414)1266512345678910111213141516171819

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-2 2.2 Pin Assignments  D: Digital, A: Analog  IO: Input and Output (Bi-direction), O: Output, I: I

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-3 Num PIN Name Default @RESET PULL up/dn @RESET I/O state @RESET 1st 2nd 3rd 4th 30 P0.10 SEG3 TCLK7 SS

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-4 Num PIN Name Default @RESET PULL up/dn @RESET I/O state @RESET 1st 2nd 3rd 4th 65 P1.11 SEG36 TCLK0 P

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-5 Num PIN Name Default @RESET PULL up/dn @RESET I/O state @RESET 1st 2nd 3rd 4th 100 AVDD0 AVDD0 AVDD0

Important Notice The information in this publication has been carefully checked and is believed to be entirely accurate at the time of publi

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-6 2.3 Pin Description  D: Digital, A: Analog  IO: Input and Output (Bi-direction), O: Output, I: I

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-7 2.3.5 USART Interface Name I/O Description D/A USARTCLK[3:0] IO External Clock Signal Input / Intern

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-8 2.3.11 CAN Interface Name I/O Description D/A CANTX[1:0] O Transmit Data Output D CANRX[1:0] I Recei

S3FM02G_DS_REV 1.00 2 PIN CONFIGURATION 2-9 2.3.16 GPIOs Name I/O Description D/A P0[31:0] IO General Purpose I/O port 0 D P1[31:0] IO General P

S3FM02G_DS_REV 1.00 3 SYSTEM MEMORY MANAGEMENT 3-1 3 SYSTEM MEMORY MANAGEMENT 3.1 Default Memory Map The S3FM02G has memory space allocation as

S3FM02G_DS_REV 1.00 3 SYSTEM MEMORY MANAGEMENT 3-2 3.2 Special Function Register Map 3.2.1 Core Special Function Register Map Table 3-2 Core

S3FM02G_DS_REV 1.00 3 SYSTEM MEMORY MANAGEMENT 3-3 Peripheral Group Base Address Peripheral Description 0x4007_6000 PWM6 Pulse Width Modulation 6

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-1 4 ELECTRICAL DATA 4.1 Absolute Maximum Ratings Stresses above those listed in "Absolute Maximum

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-2 4.2 Recommended Operation Conditions The recommended operating conditions are required in order to ens

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-3 4.3 I/O D.C. Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Paramete

Revision History Revision No. Date Description Author(s) 1.00 Jan. 10, 2011  Juil. Kim

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-4 4.4 I/O Capacitance (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Parameter Symbol

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-5 4.6 External Interrupt Input Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V t

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-6 4.7 Oscillator Characteristics 4.7.1 External Main Clock Oscillator Characteristics (TA = –40 to 85 

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-7 4.7.3 Internal Main Clock Oscillator Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-8 4.8 Current Consumption (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 5.5V) Parameter Symbol Cond

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-9 Parameter Symbol Condition Mode Min. Typ. Max. Unit Run CPU by ISCLK IDD61 (3) CPU stops in IDD51 Condi

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-10 (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 3.3V) (3) Parameter Symbol Condition Mode Min. Typ.

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-11 Parameter Symbol Condition Mode Min. Typ. Max. Unit LVD OFF, LCD OFF IDD72 Disable EMCLK, IMCLK, and E

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-12 (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V) (3) Parameter Symbol Condition Mode Min. Typ.

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-13 Parameter Symbol Condition Mode Min. Typ. Max. Unit Condition. LVD OFF, LCD OFF IDD62 CPU stops in IDD

Table of Contents 1 OVERVIEW ... 1-1 1.1 Pur

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-14 4.9 LVD Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Oscillator S

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-15 4.10 12-Bit ADC0 Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Par

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-16 4.10.1 OP-AMP Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Parame

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-17 4.11 10-Bit ADC1 Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Par

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-18 4.12 LCD Characteristics (TA = –40 to 85 C, VDD = VDDCORE = VDDIO = AVDD = 2.7V to 5.5V) Parameter S

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-19 4.13 Memory Characteristics 4.13.1 Program Flash Memory Characteristics (TA = –40 to 85 C, VDD = VD

S3FM02G_DS_REV 1.00 4 ELECTRICAL DATA 4-20 4.14 ESD Characteristics Parameter Symbol Conditions Min Typ Max Unit Electrostatic discharge VESD HB

S3FM02G_DS_REV 1.00 5 PACKAGE SPECIFICATION 5-1 5 PACKAGE SPECIFICATION 5.1 Overview This chapter describes the package information of S3FM02G.

S3FM02G_DS_REV 1.00 5 PACKAGE SPECIFICATION 5-2 5.2 Package Dimension Figure 5-1 128ETQFP-1414 Package Dimension

4.7.4 Internal Sub Clock Oscillator Characteristics ... 4-7

List of Figures Figure Title Page Number Number Figure 1-1 S3FM02G Block Diagram ...

List of Tables Table Title Page Number Number Table 2-1 Pin Assignments – Pin Number Order ...

List of Conventions Register RW Access Type Conventions Type Definition Description R Read Only The application has permission to read the R

S3FM02G_DS_REV 1.00 1 OVERVIEW 1-1 1 OVERVIEW 1.1 Purpose This Document The purpose of this document is to provide a complete reference specifi