
8050
8050
N/B Maintenance
N/B Maintenance
12
AGTL+ bus driver technology with integrated GTL termination resistors and low voltage operation
(1.05V)
Supports Enhanced Intel® Speed Step TM Technology (EIST) and Geyserville III
Support for DPWR# signal to Banias processor for PSB power management
Memory System
Directly supports one DDR channel, 64-bts wide (72-b with ECC).
Supports 200-MHz and 266-MHz DDR devices with max of 2 Double-Sided SO-DIMMs(4 rows populated)
with unbuffered PC1600/PC2100 DDR(with ECC).
Supports 128-Mb, 256-Mb and 512-Mbit technologies providing maximum capacity of 1-GB with only x 16
devices.
All supported devices have 4 banks.
Supports up to 16 simultaneous open pages.
Supports page sizes of 2KB, 4KB, 8KB, and 16KB. Page size is individually selected for every row. UMA
support only.
System Interrupt
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