Samsung YP-P10 User Manual download pdf (Page 137)

100

101

S3C2440A RISC MICROPROCESSOR ARM INSTRUCTION SET

3-53

COPROCESSOR DATA TRANSFERS (LDC, STC)

The instruction is only executed if the condition is true. The various conditions are defined in Table 3-2. The

instruction encoding is shown in Figure 3-26.

This class of instruction is used to load (LDC) or store (STC) a subset of a coprocessors's registers directly to

memory. ARM920T is responsible for supplying the memory address and the coprocessor supplies or accepts the

data and controls the number of words transferred.

[7:0] Unsigned 8 Bit Immediate Offset

[11:8] Coprocessor Number

[15:12] Coprocessor Source/Destination Register

[19:16] Base Register

[20] Load/Store Bit

0 = Store to memory

1 = Load from memory

[21] Write-back Bit

0 = No write-back

1 = Write address into base

[22] Transfer Length

[23] Up/Down Bit

0 = Down: subtract offset from base

1 = Up: add offset to base

[24] Pre/Post Indexing Bit

0 = Post: add offset after transfer

1 = Pre: add offset before transfer

[31:28] Condition Field

31 27 19 15

Cond

28 16 11122123

L Rn CRd

110 P U CP#W

2425

Offset

8 7 0

Figure 3-26. Coprocessor Data Transfer Instructions

1 2 ... 132 133 134 135 136 137 138 139 140 141 142 ... 595 596

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Samsung YP-P10 User Manual Page 137

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