ELECTRICAL DATA S3C2440A RISC MICROPROCESSOR
27-20
HCLK
nGCSx
t
RAD
Tacs
nOE
Tcos
DATA
ADDR
t
RCD
t
ROD
t
RDS
t
RDH
t
RAD
Tacc
Figure 27-18. Masked-ROM Single READ Timing Diagram (Tacs=2, Tcos=2, Tacc=8, PMC=01/10/11)
HCLK
nGCSx
t
RAD
nOE
DATA
ADDR
t
RCD
t
ROD
t
RDS
t
RDH
t
RAD
Tacc Tpac Tpac Tpac Tpac
t
RAD
t
RAD
t
RAD
t
RAD
t
RDS
t
RDH
t
RDS
t
RDH
t
RDS
t
RDH
t
RDS
t
RDH
Figure 27-19. Masked-ROM Consecutive READ Timing Diagram
(Tacs=0, Tcos=0, Tacc=3, Tpac=2, PMC=01/10/11)
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