Samsung YP-P10 User Manual download pdf (Page 467)

100

101

MMC/SD/SDIO CONTROLLER S3C2440A RISC MICROPROCESSOR

19-4

SDI SPECIAL REGISTERS

SDI Control Register (SDICON)

SDICON 0x5A000000 R/W SDI control register 0x0

SDICON Bit Description Initial Value

Reserved [31:9] –

SDMMC Reset

(SDreset)

[8] Reset whole sdmmc block. This bit is automatically cleared.

0 = Normal mode, 1 = SDMMC reset

Reserved [7:6] 0

Clock Type (CTYP) [5] Determines which clock type is used as SDCLK.

0 = SD type, 1 = MMC type

Byte Order

Type(ByteOrder)

[4] Determines byte order type when you read(write) data from(to)

sd host FIFO with word boundary.

0 = Type A, 1 = Type B

Receive SDIO

Interrupt from card

(RcvIOInt)

[3] Determines whether sd host receives SDIO Interrupt from the

card or not(for SDIO).

0 = Ignore, 1 = Receive SDIO Interrupt

Read Wait

Enable(RWaitEn)

[2] Determines read wait request signal generate when sd host

waits the next block in multiple block read mode. This bit needs

to delay the next block to be transmitted from the card(for

SDIO).

0 = Disable(no generate), 1 = Read wait enable(use SDIO)

Reserved [1]

Clock Out Enable

(ENCLK)

[0] Determines whether SDCLK Out enable or not

0 = Disable (prescaler off), 1 = Clock enable

NOTE: Byte Order Type

Type A: (Access by Word) D[7:0] → D[15:8] → D[23:16] → D[31:24]

(Access by Halfword) D[7:0] → D[15:8]

Type B: (Access by Word) D[31:24] → D[23:16] → D[15:8] → D[7:0]

(Access by Halfword) D[15:8] → D[7:0]

SDI Baud Rate Prescaler Register (SDIPRE)

SDIPRE 0x5A000004 R/W SDI buad rate prescaler register 0x01

SDIPRE Bit Description Initial Value

Prescaler Value [7:0] Determines SDI clock(SDCLK) rate as above equation.

Baud rate = PCLK / (Prescaler value + 1)

0x01

NOTE: Prescaler Value should be greater than zero.

1 2 ... 462 463 464 465 466 467 468 469 470 471 472 ... 595 596

Comments to this Manuals

No comments

Samsung YP-P10 User Manual Page 467

Comments to this Manuals

Related products and manuals for MP3/MP4 players Samsung YP-P10