Samsung YP-P10 User Manual download pdf (Page 168)

100

101

THUMB INSTRUCTION SET S3C2440A RISC MICROPROCESSOR

4-20

FORMAT 8: LOAD/STORE SIGN-EXTENDED BYTE/HALFWORD

[2:0] Destination Register

[5:3] Base Register

[8:6] Offset Register

[10] Sign-Extended Flag

0 = Operand not sing-extended

1 = Operand sing-extended

[11] H Flag

15 0

6 5

3 2

Rd1 0

13 12

Rb1 H S

9 8

Ro1

Figure 4-9. Format 8

OPERATION

These instructions load optionally sign-extended bytes or halfwords, and store halfwords. The THUMB assembler

syntax is shown below.

Table 4-9. Summary of Format 8 Instructions

L B THUMB assembler ARM equivalent Description

0 0 STRH Rd, [Rb, Ro] STRH Rd, [Rb, Ro] Store halfword:

Add Ro to base address in Rb. Store bits

0-15 of Rd at the resulting address.

0 1 LDRH Rd, [Rb, Ro] LDRH Rd, [Rb, Ro] Load halfword:

Add Ro to base address in Rb. Load bits

0-15 of Rd from the resulting address, and

set bits 16-31 of Rd to 0.

1 0 LDSB Rd, [Rb, Ro] LDRSB Rd, [Rb, Ro] Load sign-extended byte:

Add Ro to base address in Rb. Load bits

0-7 of Rd from the resulting address, and

set bits 8-31 of Rd to bit 7.

1 1 LDSH Rd, [Rb, Ro] LDRSH Rd, [Rb, Ro] Load sign-extended halfword:

Add Ro to base address in Rb. Load bits

0-15 of Rd from the resulting address, and

set bits 16-31 of Rd to bit 15.

1 2 ... 163 164 165 166 167 168 169 170 171 172 173 ... 595 596

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