Samsung YP-P10 User Manual Page 57

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PRODUCT OVERVIEW S3C2440A RISC MICROPROCESSOR
1-28
Table 1-4. S3C2440A Special Registers (Sheet 3 of 14) (Continued)
Register
Name
Address
(B. Endian)
Address
(L. Endian)
Acc.
Unit
Read/
Write
Function
DMA
DISRC0 0x4B000000 W R/W DMA 0 initial source
DISRCC0 0x4B000004 DMA 0 initial source control
DIDST0 0x4B000008 DMA 0 initial destination
DIDSTC0 0x4B00000C DMA 0 initial destination control
DCON0 0x4B000010 DMA 0 control
DSTAT0 0x4B000014 R DMA 0 count
DCSRC0 0x4B000018 DMA 0 current source
DCDST0 0x4B00001C DMA 0 current destination
DMASKTRIG0 0x4B000020 R/W DMA 0 mask trigger
DISRC1 0x4B000040 DMA 1 initial source
DISRCC1 0x4B000044 DMA 1 initial source control
DIDST1 0x4B000048 DMA 1 initial destination
DIDSTC1 0x4B00004C DMA 1 initial destination control
DCON1 0x4B000050 DMA 1 control
DSTAT1 0x4B000054 R DMA 1 count
DCSRC1 0x4B000058 DMA 1 current source
DCDST1 0x4B00005C DMA 1 current destination
DMASKTRIG1 0x4B000060 R/W DMA 1 mask trigger
DISRC2 0x4B000080 DMA 2 initial source
DISRCC2 0x4B000084 DMA 2 initial source control
DIDST2 0x4B000088 DMA 2 initial destination
DIDSTC2 0x4B00008C DMA 2 initial destination control
DCON2 0x4B000090 DMA 2 control
DSTAT2 0x4B000094 R DMA 2 count
DCSRC2 0x4B000098 DMA 2 current source
DCDST2 0x4B00009C DMA 2 current destination
DMASKTRIG2 0x4B0000A0 R/W DMA 2 mask trigger
DISRC3 0x4B0000C0 W R/W DMA 3 initial source
DISRCC3 0x4B0000C4 DMA 3 initial source control
DIDST3 0x4B0000C8 DMA 3 initial destination
DIDSTC3 0x4B0000CC DMA 3 initial destination control
DCON3 0x4B0000D0 DMA 3 control
DSTAT3 0x4B0000D4 R DMA 3 count
DCSRC3 0x4B0000D8 DMA 3 current source
DCDST3 0x4B0000DC DMA 3 current destination
DMASKTRIG3 0x4B0000E0 R/W DMA 3 mask trigger
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