S3C2440A RISC MICROPROCESSOR ELECTRICAL DATA
27-31
XSCLK
t
XRS
t
XRS
t
CADL
t
CADH
t
XAD
XnXDREQ
XnXDACK
Read Write
Min. 3SCLK
Figure 27-30. External DMA Timing Diagram (Handshake, Single transfer)
VSYNC
HSYNC
VDEN
Tf2hsetup
Tf2hhold
Tvspw Tvbpd
Tvfpd
HSYNC
VCLK
VD
VDEN
LEND
Tl2csetup Tvclkh Tvclk
Tvclkl Tvdhold
Tvdsetup Tve2hold
Tle2chold
Tlewidth
Figure 27-31. TFT LCD Controller Timing Diagram
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