Samsung YP-P10 User Manual download pdf (Page 514)

100

101

S3C2440A RISC MICROPROCESSOR CAMERA INTERFACE

23-5

CAMERA INTERFACE OPERATION

TWO DMA PATHS

CAMIF has 2 DMA paths. P-path (Preview path) and C-path (Codec path) are separated from each other on the

AHB bus. In view of the system bus, both the paths are independent. The P-path stores the RGB image data into

memory for PIP. The C-path stores the YCbCr 4:2:0 or 4:2:2 image data into memory for Codec as MPEG-4, H.263,

etc. These two master paths support the variable applications like DSC (Digital Steel Camera), MPEG-4 video

conference, video recording, etc. For example, P-path image can be used as preview image, and C-path image can

be used as JPEG image in DSC application. Register setting can separately disable to P-path or C-path.

CAMIF

External

Camera

Processor

Frame Memory (SDRAM)

P-port

C-port

ITU format

PIP

RGB

Codec image

YCbCr 4:2:0

YCbCr 4:2:2

Window cut

CAMIF

External

Camera

Processor

Frame Memory (SDRAM)

P-port

C-port

ITU format

PIP

RGB

Codec image

YCbCr 4:2:0

YCbCr 4:2:2

Figure 23-4. Two DMA Paths

CLOCK DOMAIN

CAMIF has two clock domains. One is the system bus clock, which is HCLK. The other is the pixel clock, which is

CAMPCLK. The system clock must be faster than pixel clock. Figure 23-5 shows CAMCLKOUT must be divided

from the fixed frequency like USB PLL clock. If external clock oscillator is used, CAMCLKOUT should be floated.

Internal scaler clock is system clock. It is not necessary for two clock domains to synchronize each other. Other

signals such as CAMPCLK should be similarly connected to the Schmitt-triggered level shifter.

1 2 ... 509 510 511 512 513 514 515 516 517 518 519 ... 595 596

Comments to this Manuals

No comments

Samsung YP-P10 User Manual Page 514

Comments to this Manuals

Related products and manuals for MP3/MP4 players Samsung YP-P10